9 著者名表示.
| 発行日 | タイトル |
著者 |
|---|
| 20-Jan-2000 | A new delay yield model for digital circuits | Jiang, X. H.; Horiguchi, S. |
| 28-Jan-2000 | Clock skew yield estimate of well-balanced H-tree | Jiang, X. H.; Horiguchi, S. |
| 5-Apr-2000 | A recursive approach to estimating clock skew yield and clock delay yield for general clock distribution networks | Jiang, X. H.; Horiguchi, S. |
| 1-May-2000 | A new statistical skew model used for clock period optimization of H-free | Jiang, X. H.; Horiguchi, S. |
| 1-Jun-2000 | Distribution analysis of clock skew and clock delay for general clock dis | Jiang, X. H.; Horiguchi, S. |
| 11-Aug-2000 | Clock distribution for TESH connected multi-processor system | Jiang, X. H.; Horiguchi, S. |
| 16-Nov-2000 | Probabilistic analysis of directional-couple-based photonic switching | Jiang, X. H.; Horiguchi, S. |
| 30-Nov-2001 | Crosstalk-Free Permutation in Rearrangeable Nonblocking Optical | Jiang, X. H.; Khandker, Md. M. R.; Shen, H.; Horiguchi, S |
| 11-Aug-2003 | An Efficient Approach to Analyzing the Blocking Behavior of Photonic Switching Network Built on the Vertical Stacking of Banyan Networks under Random Routing | Jiang, X. H.; Horiguchi, S. |
