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このアイテムの引用には次の識別子を使用してください:
http://hdl.handle.net/10119/12866
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| タイトル: | Tunable Threshold Voltage of Organic CMOS Inverter Circuits by Electron Trapping in Bilayer Gate Dielectrics |
| 著者: | Dao, Toan Thanh
Murata, Hideyuki |
| キーワード: | controllable threshold voltage
stretch-exponential equation
noise margin enhancement
organic CMOS inverter |
| 発行日: | 2015-05-01 |
| 出版者: | 電子情報通信学会 |
| 誌名: | IEICE TRANSACTIONS on Electronics |
| 巻: | E98-C |
| 号: | 5 |
| 開始ページ: | 422 |
| 終了ページ: | 428 |
| DOI: | 10.1587/transele.E98.C.422 |
| 抄録: | We have demonstrated tunable n-channel fullerene and p-channel pentacene OFETs and CMOS inverter circuit based on a bilayer-dielectric structure of CYTOP (poly(perfluoroalkenyl vinyl ether)) electret and SiO_2. For both OFET types, the V_<th> can be electrically tuned thanks to the charge-trapping at the interface of CYTOP and SiO_2. The stability of the shifted V_<th> was investigated through monitoring a change in transistor current. The measured transistor current versus time after programming fitted very well with a stretched-exponential distribution with a long time constant up to 10^6 s. For organic CMOS inverter, after applying the program gate voltages for n-channel fullerene or p-channel pentacene elements, the voltage transfer characteristics were shifted toward more positive values, resulting in a modulation of the noise margin. We realized that at a program gate voltage of 60 V for p-channel OFET, the circuit switched at 4, 8 V, that is close to half supply voltage V_<DD>, leading to the maximum electrical noise immunity of the inverter circuit. |
| Rights: | Copyright (C)2015 IEICE. Toan Thanh Dao and Hideyuki Murata, IEICE TRANSACTIONS on Electronics, E98-C(5), 2015, 422-428. http://www.ieice.org/jpn/trans_online/ |
| URI: | http://hdl.handle.net/10119/12866 |
| 資料タイプ: | publisher |
| 出現コレクション: | c10-1. 雑誌掲載論文 (Journal Articles)
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このアイテムのファイル:
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記述 |
サイズ | 形式 |
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| 21450.pdf | | 1097Kb | Adobe PDF | 見る/開く |
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