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Please use this identifier to cite or link to this item: http://hdl.handle.net/10119/4653

Title: Analysis on Operation of a F-FET Memory With an Intermediate Electrode
Authors: Khoa, Tran Dang
Horita, Susumu
Keywords: Capacitor
ferroelectric
ferroelectric devices
ferroelectric film
ferroelectric memory
field-effect transistors (FET)
Issue Date: 2004-05
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Magazine name: IEEE Transactions on Electron Devices
Volume: 51
Number: 5
Start page: 820
End page: 823
DOI: 10.1109/TED.2004.825808
Abstract: An operation model of a ferroelectric gate field-effect transistor memory with an intermediate electrode was proposed and analyzed. Read endurance characteristics of the memory during a consecutive reading was simulated using this model. The simulation results showed good agreement with the experimental data.
Rights: Copyright (c)2004 IEEE. Reprinted from IEEE Transactions on Electron Devices, 51(5), 2004, 820-823. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of JAIST's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it.
URI: http://hdl.handle.net/10119/4653
Material Type: publisher
Appears in Collections:c10-1. 雑誌掲載論文 (Journal Articles)

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