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このアイテムの引用には次の識別子を使用してください:
http://hdl.handle.net/10119/4653
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| タイトル: | Analysis on Operation of a F-FET Memory With an Intermediate Electrode |
| 著者: | Khoa, Tran Dang
Horita, Susumu |
| キーワード: | Capacitor
ferroelectric
ferroelectric devices
ferroelectric film
ferroelectric memory
field-effect transistors (FET) |
| 発行日: | 2004-05 |
| 出版者: | Institute of Electrical and Electronics Engineers (IEEE) |
| 誌名: | IEEE Transactions on Electron Devices |
| 巻: | 51 |
| 号: | 5 |
| 開始ページ: | 820 |
| 終了ページ: | 823 |
| DOI: | 10.1109/TED.2004.825808 |
| 抄録: | An operation model of a ferroelectric gate field-effect transistor memory with an intermediate electrode was proposed and analyzed. Read endurance characteristics of the memory during a consecutive reading was simulated using this model. The simulation results showed good agreement with the experimental data. |
| Rights: | Copyright (c)2004 IEEE. Reprinted from IEEE Transactions on Electron Devices, 51(5), 2004, 820-823. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of JAIST's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it. |
| URI: | http://hdl.handle.net/10119/4653 |
| 資料タイプ: | publisher |
| 出現コレクション: | c10-1. 雑誌掲載論文 (Journal Articles)
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このアイテムのファイル:
| ファイル |
記述 |
サイズ | 形式 |
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| 4124.pdf | | 208Kb | Adobe PDF | 見る/開く |
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