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Please use this identifier to cite or link to this item: http://hdl.handle.net/10119/5006

Title: A 2K-Gate GaAs Gate Array with a WN Gate Self-Alignment FET Process
Authors: Toyoda, Nobuyuki
Uchitomi, Naotaka
Kitaura, Yoshiaki
Mochizuki, Masao
Kanazawa, Katsue
Terada, Toshiyuki
Ikawa, Yasuo
Hojo, Akimichi
Issue Date: 1985-10
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Magazine name: IEEE Journal of Solid-State Circuits
Volume: 20
Number: 5
Start page: 1043
End page: 1049
Abstract: A 2K-gate DCFL GaAs gate array has been successfully fabricated with a WN gate self-alignment GaAs MESFET process. Chip size was 4.59 mm×4.73 mm. A basic cell, consisting of one DFET and three EFET’s, can be programmed as an inverter or a two or three-INPUT NOR gate by personalizing with first- and second-level interconnection and via hole masks. The I/O buffer was implemented with a large DCFL push-pull circuit. The unloaded propagation delay time was 42 ps/gate at a power dissipation of 0.5 mW/gate. The increases in delay time due to various loading capacitances were 11-ps/fan-in, 16-ps/fan-out, 59-ps/1-mm interconnection and 0.95 ps/crossover (area: 2 μm×3 μm). An 8×8-bit parallel multiplier was fabricated on this gate-array chip. A multiplication time of 8.5 ns was achieved at a power dissipation of about 400 mW including I/O buffers.
Rights: Copyright (C)1985 IEEE. Reprinted from IEEE Journal of Solid-State Circuits, 20(5), 1985, 1043-1049. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of JAIST's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it.
URI: http://hdl.handle.net/10119/5006
Material Type: publisher
Appears in Collections:a10-1. 雑誌掲載論文 (Journal Articles)

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