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Please use this identifier to cite or link to this item: http://hdl.handle.net/10119/5007

Title: A One-Day Chip: An Innovative IC Construction Approach Using Electrically Reconfigurable Logic VLSI with On-Chip Programmable Interconnections
Authors: Ikawa, Yasuo
Urui, Kiyoshi
Wada, Masashi
Takada, Tomoji
Kawamura, Masahiko
Miyata, Misao
Amano, Noboru
Shibata, Tadashi
Issue Date: 1986-04
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Magazine name: IEEE Journal of Solid-State Circuits
Volume: 21
Number: 2
Start page: 223
End page: 227
Abstract: A new custom IC design methodology and the associated logic VLSI chip, which offer an ultimately fast turnaround-time logic IC construction method, are proposed. Using the new VLSI chip, digital system and logic designers can construct their own real IC chip with thousands of logic gates, as easily as if they drew logic diagrams to be implemented in the form of a printed-circuit board, which would utilize standard logic IC families. This construction can even be carried out in a second, because logic structures can be reconfigured electrically, due to on-chip programmable interconnection capability. This chip contains various kinds of logic functional blocks, such as inventers, NOR’s, NAND’s, flip-flops, shift registers, counters, adders, multiplexers, ALU’s, and so on. Up to 200 SSI/MSI standard logic blocks can be provided. The E^2 PROM-type MOSFET switch matrix is adjacent to the functional blocks, in order to connect any output to specific inputs of the functional blocks. It also offers a ready-to-test aid, obtained by monitoring the signal waveform developed inside the chip. These features have the advantage over the present custom IC design methods, such as gate array, standard cell, silicon compiler, or programmable logic array (PLA) approaches, in the sense that the designer can easily redesign the logic to obtain a digital system in an IC even within one day.
Rights: Copyright (C)1986 IEEE. Reprinted from IEEE Journal of Solid-State Circuits, 21(2), 1986, 223-227. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of JAIST's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it.
URI: http://hdl.handle.net/10119/5007
Material Type: publisher
Appears in Collections:a10-1. 雑誌掲載論文 (Journal Articles)

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