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JAIST Repository >
一覧: 日付
検索結果: 19017-19023 / 19023.
| 発行日 | タイトル |
著者 |
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| Apr-1986 | A One-Day Chip: An Innovative IC Construction Approach Using Electrically Reconfigurable Logic VLSI with On-Chip Programmable Interconnections | Ikawa, Yasuo; Urui, Kiyoshi; Wada, Masashi; Takada, Tomoji; Kawamura, Masahiko; Miyata, Misao; Amano, Noboru; Shibata, Tadashi |
| Oct-1985 | A 2K-Gate GaAs Gate Array with a WN Gate Self-Alignment FET Process | Toyoda, Nobuyuki; Uchitomi, Naotaka; Kitaura, Yoshiaki; Mochizuki, Masao; Kanazawa, Katsue; Terada, Toshiyuki; Ikawa, Yasuo; Hojo, Akimichi |
| Feb-1985 | A 42ps 2K-gate GaAs gate array | Toyoda, Nobuyuki; Uchitomi, Naotaka; Kitaura, Yoshiaki; Mochizuki, Masao; Kanazawa, Katsue; Terada, Toshiyuki; Ikawa, Yasuo; Hojo, Akimichi |
| Oct-1984 | A 1K-Gate GaAs Gate Array | Ikawa, Yasuo; Toyoda, Nobuyuki; Mochizuki, Masao; Terada, Toshiyuki; Kanazawa, Katsue; Hirose, Mayumi; Mizoguchi, Takamaro; Hojo, Akimichi |
| Feb-1984 | A 1K-Gate GaAs Gate Array | Ikawa, Yasuo; Toyoda, Nobuyuki; Mochisuki, Masao; Terada, Toshiyuki; Kanazawa, Katsue; Hirose, Mayumi; Mizoguchi, Takamaro; Hojo, Akimichi |
| Apr-1982 | Modeling of High-Speed, Large-Signal Transistor Switching Transients from s-Parameter Measurements | Ikawa, Yasuo; Eisenstadt, William R.; Dutton, Robert W. |
| 1981 | Modeling of high-speed, large-signal transistor switching transients from s-parameter measurements | Ikawa, Yasuo; Eisenstadt, William R.; Dutton, Robert W. |
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